Research on FPGA Testing Technology Based on UVM

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Zeng Qingle，SongWenqiang，Li Jinglei

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Abstract Dramatically increasing in the scale and complexity of FPGA design makes it more difficult to be tested. This article studies the structure and characteristics of universal verification methodology (UVM). It uses UVM to set up the verification platform, taking the TS101 as the host computer and FPGA as function of the interface control, verifying the correctness of the FPGA logic design.

Key words： FPGA universal verification methodology DUT

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TN407

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	Zeng Qingle
	SongWenqiang
	Li Jinglei

Cite this article:

Zeng Qingle, SongWenqiang, Li Jinglei. Research on FPGA Testing Technology Based on UVM. Computer & Telecommunication, 2016, 1(5): 65-67.

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http://www.computertelecom.com.cn/EN/ OR http://www.computertelecom.com.cn/EN/Y2016/V1/I5/65

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