As the technology minimum size reaches to 65nm, the chip integration is more and more high, the size of the device is smaller and the width of the line is also reduced. Because of these factors, the parasitic effect is larger and becomes more important to SRAM. This article uses the full custom design flow, introduces how to realize SRAM using different function module layout and IP module. It reduces the impact of interconnect parasitic and guarantees the high speed running of SRAM.