The parameters of the PWM wave generated by the existing methods, such as frequency and duty cycle, have limitations in terms of adjustment flexibility, making it difficult to meet the requirements of actual circuits for accuracy and flexibility. To address this issue, this paper proposes a new parameterized and modular PWM wave design scheme based on Field Programmable Gate Array (FPGA). This scheme introduces a counter inside the FPGA and achieves high-precision adjustable duty cycle and frequency of the PWM wave through parameter soft control. Moreover, it introduces delay triggers and logic operations inside the FPGA to configure the dead time. Take the PWM wave control of the Buck circuit for example, the FPGA collects the output current parameters in real time, generates feedback signals through a comparator, and adjusts the duty cycle of the PWM wave according to the feedback signal status, thereby achieving closed-loop control of the output current of the Buck topology. Through simulation verification by Quartus software and actual circuit testing, it can be achieved that the adjustable frequency range is 1 Hz to 50 MHz, with a step precision of 5 Hz at a frequency of 50 KHz; the adjustable duty cycle range is 0% to 100%, with a step precision of 0.1% at a frequency of 50 KHz; the minimum dead time is 20 ns, with a step progress of 20 ns; and the ripple coefficient of the Buck constant current circuit is 1.8%.