Abstract
In some areas of data acquisition, it is necessary to sample the signal at a high rate, but a single chip is difficult to meet the
requirements. This design adopts three-channel ADC cross-sampling mode, combined with sampling clock phase difference design,
sampling error correction, high-speed data processing measures, through the comparison of the sampled signal and the restored sig-
nal, the correctness of the design is verified. The highest sampling rate of this design can reach 195MHz
Key words
AD9226 /
FPGA /
cross sampling
Cite this article
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FENG Jin GAO Wen-bin ZENG Zhi-yang LI Zhu.
Design of High Speed Cross Sampling Based on FPGA and AD9226[J]. Computer & Telecommunication. 2020, 1(1-2): 6-10
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