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Design of High Speed Cross Sampling Based on FPGA and AD9226 |
FENG Jin GAO Wen-bin ZENG Zhi-yang LI Zhu |
Shanxi Normal University |
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Abstract In some areas of data acquisition, it is necessary to sample the signal at a high rate, but a single chip is difficult to meet the
requirements. This design adopts three-channel ADC cross-sampling mode, combined with sampling clock phase difference design,
sampling error correction, high-speed data processing measures, through the comparison of the sampled signal and the restored sig-
nal, the correctness of the design is verified. The highest sampling rate of this design can reach 195MHz
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Published: 13 January 2020
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