现有方法产生的PWM波的频率、占空比等参数在调节灵活性方面存在局限,难以满足实际电路对精度和灵活度的需求。为解决这一问题,提出一种基于现场可编程门阵列（FPGA）的参数化、模块化的新型PWM波设计方案,该方案在FPGA内部引入计数器,通过参数软控制实现PWM波的占空比和频率的高精度可调,并在FPGA内部引入了延迟触发器和逻辑运算,从而实现对死区时间的配置。以PWM波控制Buck电路为实例,用FPGA实时采集输出电流参数,通过比较器比较生成反馈信号,FPGA根据反馈信号状态调整PWM波占空比,实现了对Buck拓扑输出电流的闭环控制。经Quartus软件仿真验证及实际电路测试,可实现频率可调范围为1 Hz~50 MHz,频率为50 KHz时其步进精度为5 Hz;占空比可调范围为0%~100%,频率为50 KHz时其步进精度为0.1%;死区时间最小达20 ns,其步进进度为20 ns;Buck恒流电路纹波系数为1.8%。

The parameters of the PWM wave generated by the existing methods, such as frequency and duty cycle, have limitations in terms of adjustment flexibility, making it difficult to meet the requirements of actual circuits for accuracy and flexibility. To address this issue, this paper proposes a new parameterized and modular PWM wave design scheme based on Field Programmable Gate Array (FPGA). This scheme introduces a counter inside the FPGA and achieves high-precision adjustable duty cycle and frequency of the PWM wave through parameter soft control. Moreover, it introduces delay triggers and logic operations inside the FPGA to configure the dead time. Take the PWM wave control of the Buck circuit for example, the FPGA collects the output current parameters in real time, generates feedback signals through a comparator, and adjusts the duty cycle of the PWM wave according to the feedback signal status, thereby achieving closed-loop control of the output current of the Buck topology. Through simulation verification by Quartus software and actual circuit testing, it can be achieved that the adjustable frequency range is 1 Hz to 50 MHz, with a step precision of 5 Hz at a frequency of 50 KHz; the adjustable duty cycle range is 0% to 100%, with a step precision of 0.1% at a frequency of 50 KHz; the minimum dead time is 20 ns, with a step progress of 20 ns; and the ripple coefficient of the Buck constant current circuit is 1.8%.