Abstract: In some areas of data acquisition, it is necessary to sample the signal at a high rate, but a single chip is difficult to meet the
requirements. This design adopts three-channel ADC cross-sampling mode, combined with sampling clock phase difference design,
sampling error correction, high-speed data processing measures, through the comparison of the sampled signal and the restored sig-
nal, the correctness of the design is verified. The highest sampling rate of this design can reach 195MHz
冯 晋 高文斌 曾智杨 李 竹 . 基于FPGA和AD9226的高速交叉采样设计[J]. 电脑与电信, .
FENG Jin GAO Wen-bin ZENG Zhi-yang LI Zhu. Design of High Speed Cross Sampling Based on FPGA and AD9226. Computer & Telecommunication, 2020, 1(1-2): 6-10.