摘要
在芯片设计时,我们经常通过HSIPCE仿真来完成验证开发工作。HSIPCE模型是晶体管级模型,在系统级信
号完整性仿真应用中有很大的局限性:仿真耗时长,易泄露产品秘密,不利于知识产权保护。当前,在系统级信号完整性仿真
中,IBIS 模型被广泛使用,能被主流的软件接受并应用于仿真工作。因此,我们需进行器件的IBIS 模型建模,并将IBIS 模型提
供给用户。本文主要介绍IBIS 模型及模型的创建方法与模型的验证。
Abstract
As a rule, HSIPCE emulator is always used to do validation in the IC’s design. The HSIPCE model is a transistor level
model, which has limitations on the system level simulation: long time simulating consumption, easy to reveal the product’s privacy
and unfriendly to protect the intellectual property rights. The IBIS model is widely used at the currently system level simulation
analysis, it can be adopted by the mainstream of simulation software. As a result, we must prepare the IBIS model, and provide it to
our user. This article introduces the IBIS model and the method to build and validate this model.
关键词
信号完整性 /
仿真 /
HSIPCE /
IBIS /
模型
Key words
signal integrality /
simulate /
HSIPCE /
IBIS /
model
侯建平, 刘建新, 黄典尉.
一种IBIS模型建模方法[J]. 电脑与电信. 2017, 1(7): 48-50
Hou Jianping, Liu Jianxin, Huang Dianwei.
A Method of IBIS Model Building[J]. Computer & Telecommunication. 2017, 1(7): 48-50
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